In the past, a testing device has not been available by which a semiconductor chip can be tested under electrical and thermal conditions at the same time as needed. Under current semiconductor chip testing, reliability is determined using two industry standard methodologies: (a) wafer probing where an array of chips on a wafer are probed at room temperature; and (b) statistical sampling with thermal stress.
Wafer probing technology has been the accepted way for chip testing at room temperature. A wafer is usually four or five inches in diameter and contains an array of several chips of the same type. After probing, the wafer is scribed (cut) and separated and the individual chips are then available for use on the production floor. Wafer probing, is a static test, meaning electrical continuity between critical circuit parts are verified, but total electrical function is not determined due to time constraints and associated cost. Thermal screening is not technically feasible since there is not a thermal forcing technique available that can rapidly cycle the large mass of a four or five inch wafer. Therefore, chip integrity is still questionable after wafer probing and damage incurred during the scribing process is evaluated only by visual inspection.
Statistical sampling is another industry accepted chip test practice used to determine complete electrical functions and operating reliability, including MIL-SPEC temperature ranges. Under this methodology, one to two percent of the individual chips are separated from the wafer and mounted into a custom test fixture and subjected to dynamic electrical and thermal evaluation. Based upon the compiled test results, predicitions are made concerning the other 98 to 99 percent of chips. The chips which are used for test purposes are not usable after mounting in the test fixture.
Therefore, for the most part, chip reliability is unknown until they are assembled into the final electrical package (usually a Hybrid Microelectronic Assembly, (HMA) which is used extensively in military and space applications), and the completed HMA package is subject to MIL-SPEC final test. At this point in the manufacturing process non-functional HMA packages must undergo labor intensive troubleshooting to determine the cause of failure, and the faulty chips must be removed and replaced per MIL-SPEC procedures. In many cases the cost of repairing a faulty HMA package exceeds the cost of producing the entire package.
Accordingly, it is an object of this invention to provide a thermal test chamber device that has both the electrical testing and thermal cycling built into in a common unit so as to enable a single semiconductor chip to be both electrically and thermally subjected to test at the same time.
Another object of this invention is to provide a device that has the capability of quickly cycling a semiconductor chip from a predetermined elevated temperature to a much lower temperature in a short time span.
Another object of this invention is to provide a thermal test chamber device that has ample capacity for injecting heating or cooling directly onto the test specimen and with sufficient exhaust means to cause the test specimen to be cycled to the desired temperature quickly.
A still further object of this invention is to provide a simple thermal testing device which enables a very accurate test of both the electrical circuits of a semiconductor microchip as well as testing of the circuits at lowered and elevated temperatures.
Still a further object of this invention is to provide a thermal test chamber device that has a window in the top thereof to enable viewing of the specimen to be tested and test prongs that engage the specimen.
Others objects and advantages of this invention will be obvious to those skilled in this art.